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product structure silicon monolithic integrated circuit this product is not designed protection against radioactive rays. 1 / 18 tsz02201 - 0j3j0aj00070 - 1 - 2 ? 2012 rohm co., ltd. all rights reserved. 02.mar.2012 rev.001 tsz22111 ? 14 ? 001 www.rohm.com 4.5v to 5.5v, 0.8a 1ch s ynchronous buck converter integrated fet BD8967FVM general description rohms high efficiency step - down switching regulator BD8967FVM is a power supply designed to produce a low voltage including 3.3v volts from 5 volts power su pply line. offers high efficiency with synchronous rectifier. employs a current mode control system to provide faster transient response to sudden change in load. features offers fast transient response with current mode pwm control system. offers highl y efficiency for all load range with synchronous rectifier (nch/pch fet) incorporates soft - start function. incorporates thermal protection and ulvo functions. incorporates short - current protection circuit with time delay function. incorporates shutdown function key specifications ? i nput voltage range: 4 .5v to 5 .5v ? o utput voltage range: 3. 3v 2% ? o utput current: 0.8a ( max.) ? switching frequency: 1mhz(typ.) ? pch fet on resistance: 35 0m (typ.) ? nch fet on resistance: 250m (typ.) ? s tandby current: 0a (typ.) ? operating temp erature range : - 25 to +85 package (typ.) (typ.) (max.) msop8 : 2.9 0 mm x 4.0 0 mm x 0. 90 mm application power supply for lsi including dsp, micro computer and asic typical application circuit fig.1 typical application circuit msop 8
2 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 v out gnd pin configuration ( top view ) pin description pin no. pin name pin function 1 v out output voltage detect pin 2 ith gmamp output pin/connected phase compensation capacitor 3 en enable pin(act ive high) 4 gnd ground 5 pgnd nch fet source pin 6 sw pch/nch fet drain output pin 7 pv cc pch fet source pin 8 v cc vcc power supply input pin fig.3 block diagram fig. 2 pin configuration en v cc pv cc pgnd ith sw 7 8 6 5 3 4 2 1 en v out
3 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 absolute maximum ratings parameter symbol limits unit v cc voltage v cc - 0.3 to +7 1 v pv cc voltage pv cc - 0.3 to +7 1 v en voltage v en - 0.3 to +7 v sw,ith voltage v sw ,v ith - 0.3 to +7 v power dissipation 1 pd1 387.5 2 mw power dissipation 2 pd2 587.4 3 mw operating temperature range topr - 25 to +85 storage temperature range tstg - 55 to +150 maximum junction temperature tjmax +150 1 pd should not be exceeded. 2 derating in done 3.1mw/ for temperatures above ta=25 . 3 derating in done 4.7mw/ for temperatures above ta=25 , mounted on 70mm70mm1.6mm glass epoxy pcb. recommen ded operating ratings (ta=25 ) parameter symbol limits unit min. typ. max. v cc voltage v cc *4 4.5 5.0 5.5 v pv cc voltage p vcc *4 4.5 5.0 5.5 v en voltage v en 0 - vcc v sw average output current isw *4 - - 0.8 a 4 pd should not be exceeded. e lectrical characteristics (ta=25 , v cc =5v, en=v cc unless otherwise specified. ) parameter symbol min. typ. max. unit conditions standby current i stb - 0 10 a cc - 250 450 a enl - gnd 0.8 v standby mode en high vol tage v enh 2.0 v cc - v active mode en input current i en - 1 10 a en =5v oscillation frequency f osc 0.8 1 1.2 mhz pch fet on resistance r onp - 350 600 m vcc =5v nch fet on resistance r onn - 250 500 m vcc =5v output voltage v out 3.234 3.300 3.366 v ith si nk current i thsi 10 20 - a adj =h ith s ource c urrent i thso 10 20 - a adj =l uvlo threshold voltage v uvlo1 3.90 4.10 4.30 v v cc =4.50v uvlo2 3.95 4.20 4.50 v v cc =04.5v ss 0.5 1 2 ms timer latch time t latch 0.5 1 2 ms
4 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 typical performance curves BD8967FVM fig. 4 vcc - v out output voltage : v out [v] fig. 5 ven - v out output voltage : v out [v] fig. 6 iout - v out output voltage : v out [v] fig. 7 ta - v out output voltage : v out [v]
5 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 fig. 9 ta - f osc fig. 10 ta - r onn , r onp fig. 8 efficiency (v cc =en=5v,v out =3.3v) efficiency[%] fig.1 1 ta - v en en voltage : v en [v]
6 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 fig.1 4 soft start waveform fig.1 5 sw waveform fig.12 ta - icc fig.1 3 vcc - fosc
7 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 fig.1 6 transient response io=100 600ma(10s) 100ma(10s)
8 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 application information operation BD8967FVM is a synchronous rectifying step - down switching regulator that achieves faster transient response by employing current mode pwm control system. synchronous rectifier i t does not require the power to be dissipated by a rectifier externally connected to a conventional dc/dc converter ic, and its p.n junction shoot - through protection circuit limits the shoot - through current during operation, by which the power dissipation of the set is reduced. current mode pwm control synthesizes a pwm control signal with a inductor current feedback loop added to the voltage feedback. ? pwm (pulse width modulation) control the oscillation frequency for pwm is 1 mhz. set signal form osc turns on a p - channel mos fet (while a n - channel mos fet is turned off), and an inductor current i l increases. the current comparator (current comp) receives two signals, a current feedback control signal (sense: voltage converted from i l ) and a voltage feedback control signal (fb ), and issues a reset signal if both input signals are identical to each other, and turns off the p - channel mos fet (while a n - channel mos fet is turned on) for the rest of the fixed period. the pwm control repeat this operation. fig.1 8 diagram of current mode pwm control osc level shift driver logic r q s i l sw ith current comp gm amp. set reset fb load sense v out v out fig. 1 9 pwm switching timing chart current comp set reset sw v out pvcc gnd gnd gnd i l (ave) v out (ave) sense fb i l
9 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 description of operations ? soft - start function en terminal shifted to high activates a soft - starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. ? shutdown function with en terminal shifted to low, the device turns to standby mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to off. circuit current during standby is 0 a (typ.). ? uvlo function detects whether the input voltage sufficient to secure the output voltage of this ic is supplied. and the hysteresis width o f 100mv (typ.) is provided to prevent output chattering. fig.20 soft start, sh utdown, uvlo timing chart ? short - current protection circuit with time delay function turns off the output to protect the ic from breakdown when the incorporated current limiter is activated continuously for at least 1 ms. the output thus held tuned off m ay be recovered by restarting en or by re - unlocking uvlo. fig.2 1 short - current protection circuit with time delay timing chart hysteresis 100mv tss tss tss soft start standby mode operating mode standby mode operating mode standby mode operating mode standby mode uvlo en uvlo uvlo v cc en v out 1msec output off latch en v out limit i l standby mode operating mode standby mode operating mode en timer latch en
10 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 information on advantages advantage 1 offers fast trans ient response with current mode control system. voltage drop due to sudden change in load was reduced fig.2 2 comparison of transient response advantage 2 offers high efficiency with synchronous rectifier ? for heavier load: utilizes the synchronous rectifying mode and the low on - resistance mos fets incorporated as power transistor. on resistance of p - channel mos fet : 350m(typ.) on resistance of n - channel mos fet : 250m(typ.) advantage 3 ? supplied in sma ller package due to small - sized power mos fet incorporated. reduces a mounting area required. fig.2 4 example application r ith l co v out c ith v cc cin 10mm 15mm r ith c ith c in c o l fig.2 3 efficiency conventional product (load response i o =0.1a0.6a) o =0.1a0.6a) ? output capacitor co required for current mode control: 10f ceramic capacitor ? inductance l required for the operating frequency of 1 mhz: 4.7h inductor dc/dc con vertor controller 110mv v out i out v out i out 88mv ta=25 vcc=5.0v vo=3.3v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 output current:i out [ma] efficiency: [%]
11 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 switching regulator efficiency efficiency ? may be expressed by the equation shown below: efficiency may be improved by reducing the switching regulator power dissipation factors p d as follows: dissipation factors: 1) on resistance dissipation of inductor and fet pd(i 2 r) 2) gate charge/discharge diss ipation pd(gate) 3) switching dissipation pd(sw) 4) esr dissipation of capacitor pd(esr) 5) operating current dissipation of ic pd(ic) 1)pd(i 2 r)=i out 2 (r coil +r on ) (r coil [] dc resistance of inductor, r on [] on resistance of fet, i out [a] output current.) 2)pd(gate)=cgsfv 2 (cgs[f] gate capacitance of fet, f[hz] switching frequency, v[v] gate driving voltage of fet) 4)pd(esr)=i rms 2 esr (i rms [a] ripple current of capacitor, esr[] equivalent series resistance.) 5)pd(ic)=vini cc (i cc [a] circuit current.) as this ic functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. in case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. for dissipation, only conduction losse s due to dc resistance of inductor and on resistance of fet are considered. because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation . p=i out 2 (r coil +r on ) r on =dr onp +(1 - d)r onn d on duty (=v out /v cc ) r coil dc resistance of coil r onp on resistance of p - channel mos fet r onn on resistance of n - channel mos fet i out output current if v cc =5v, v out =1.5v, r coil =0.15, r onp =0.35, r onn =0.25 i out =0.8a, for example, d=v out /v cc =3.3/5=0.66 r on =0.660.35+(1 - 0.66)0.25 =0.231+0.085 =0.316[] p =0.8 2 (0.15+0.316) P 298.2[mw] as r onp is greater than r onn in this ic, the dissipation increases as the on duty becomes greater. with the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed. = v out i out viniin 100[%]= p out pin 100[%]= p out p out +p d 100[%] vin 2 c rss i out f i drive 3)pd(sw)= (c rss [f] reverse transfer capacitance of fet, i drive [a] peak current of gate.) 0 200 400 600 800 1000 387.5mw 587.4mw using an ic alone j - a=322.6 /w mounted on glass epoxy pcb j - a=212.8 /w power dissipation:pd [mw] 0 25 50 75 100 125 150 85 fig. 2 5
12 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 selection of components externally connected 1. selection of inductor (l) current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. the inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. if v cc =5v, v out =3.3v, f =1mhz, i l =0.30.8a=0.24a, for example select the inductor of low resistance component (such as dcr and acr) to minimize dissipation in the inductor for better efficiency. 2. selection of output capacitor (c o ) as the output rise time must be designed to fall within the soft - start time, the capacitance of output capacitor should be determined with consideration on the requirements of equation (5): in case of bd 8967 fv m , for instance, and if v out =3.3v, i out =0.8a, and t ss =1m s, inappropriate capacitance may cause problem in sta rtup. a 10 f to 100 f ceramic capacitor is recommended. the inductance significantly depends on output ripple current. as seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. i l = (v cc - v out )v out lv cc f [a] ??? appropriate ripple current at output should be 20% more or less of the maximum output current. i l =0.3i out max. [a] ??? cc - v out )v out i l v cc f [h] ??? (i l : output ripple current, and f: switching frequency) output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. output ripple voltage is determined by the equation (4) v out =i l esr [v] ??? (i l : output ripple current, esr: equivalent series resistance of output capacitor) *rating of the capacitor should be determined allowing sufficient margin against output voltage. less esr allows reduction in output ripple voltage. 22f to 100f ceramic ca =4.675 4.7[h] i l v cc il l co v out fig.26 output ripple curren t i l v cc l c o v out esr co Q ss (i limit - i out ) v out ??? limit : over current detection level, 2a(typ) co Q P 364 [f]
13 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 3. selection of input capacitor (cin) a low esr 10f/10v ceramic capacitor is recommended to reduce esr dissipation of input capacitor for better efficiency. 4. determination of r ith , c ith that works as a phase compensator as the current mode control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a cr filter consisting of a output capacitor and a load resi stance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its esr. so, the phases are easily compensated by adding a zero to the power amplifier output with c and r as described below to cancel a pole at the powe r amplifier. input capacitor to select must be a low esr capacitor of the capac itance sufficient to cope with high ripple current to prevent high transient voltage. the ripple current i rms is given by the equation (5): i rms =i out v out (v cc - v out ) v cc [a] ??? out , i rms = i out 2 < worst case > i rms(max.) i rms =0.8 5.0 (5.0 - 3.3) 5.0 =0. 46[ a rms ] gain [db] phase [deg] fig.2 9 open loop gain characteristics a 0 0 - 90 a 0 0 - 90 fz(amp.) fig. 30 error amp phase compensation characteristics fp= 2r o c o 1 fz (esr) = 2e sr c o 1 pole at power amplifier when the output current decreases, the load resistance ro increases and the pole frequency lowers. fp (min.) = 2r omax. c o 1 [hz]with lighter load (max.) = 2r omin. c o 1 [hz] with heavier load (amp.) = 2r ith c ith 1 gnd,pgnd sw v cc ,pv cc en v out ith v cc v out cin r ith c ith l esr c o r o v out fig.3 1 typical application fz (amp.) = fp (min.) 2r ith c ith 1 = 2r omax. c o 1 fig.28 input capacitor fp(min.) fp(max.) fz(esr) i out min. i out max. gain [db] phase [deg] v cc l co v out cin increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (this is because when the capacitance is doubled, the capacitor esr reduces to half.) if v cc =5.0v, v out =3.3v, and i outm ax.= 0.8a stable feedback loop may be achieved by canceling the pole fp (min.) produced by the output capacitor and the load resistance with cr zero correction by the error amplifier.
14 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 cautions on pc board layout fig.3 2 layout diagram for the sections drawn with heavy line, use thick conductor pattern as short as possible. lay out the input ceramic capacitor c in closer to the pins pv cc and pgnd, and the output capaci tor co closer to the pin pgnd. lay out c ith and r ith between the pins ith and gnd as near as possible with least necessary wiring. recommended components lists on above application symbol part value manufacturer series l inductor 4.7h sumida cmd6d11b c in ceramic capacitor 10f kyocera cm316x5r106m10a c o ceramic capacitor 10f kyocera cm316x5r106m10a c ith ceramic capacitor 330pf murata grm18series r ith resistor 51k rohm mcr10 5102 * the parts list presented above is an example of recommended parts. although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. be sure to allow sufficient margins to accommodate variations between external devices and this ic when employing the depicted circuit with other circuit constants modified. both static and transient characteristics should be considered in establishing these margins . when switching noise is substantial and may impact the system, a low pass filter should be inserted between the vcc and pvcc pins, and a schottky barrier diode established between the sw and pgnd pins. v out v cc ith gnd en pv cc sw pgnd v cc r ith gnd c o c in v out en l c ith
15 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 i/o equivalence circuit fig.33 i/o equivalence circuit en ? en pin ? sw pin pv cc sw pv cc pv cc ith ? ith pin v cc v cc v out 10k ? v out pin
16 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 operational notes 1. absolute maximum ratings while utmost ca re is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. if broken, short - mode or open - mode may not be id entified. so if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. electrical potential at gnd gnd must be designed to have the lowest electrical potential in any operating conditions. 3. short - circuiting between terminals, and mismounting when mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. failure to do so may result in ic breakdown. short - circuiting due to foreign matters entered between output terminals, or between output and power supply or gnd may also cause breakdown. 4. operation in strong electromagnetic field be noted that using the ic in the st rong electromagnetic radiation can cause operation failures. 5. thermal shutdown protection circuit thermal shutdown protection circuit is the circuit designed to isolate the ic from thermal runaway, and not intended to protect and guarantee the ic. so, t he ic the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. inspection with the ic set to a pc board if a capacitor must be connected to the pin of lower impedance during inspection with the ic set to a pc board, the capacitor must be discharged after each process to avoid stress to the ic. for electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. when connecting to jigs in the inspection process, be sure to turn off the power supply before it is connected and removed. 7. input to ic terminals this is a monolithic ic with p + isolation between p - substrate and each element as illustrated below. this p - lay er and the n - layer of each element form a p - n junction, and various parasitic element are formed. if a resistor is joined to a transistor terminal as shown in fig 3 4 . p - n junction works as a parasitic diode if the following relationship is satisfied; gn d>terminal a (at resistor side), or gnd>terminal b (at transistor side); and if gnd>terminal b (at npn transistor side), a parasitic npn transistor is activated by n - layer of other element adjacent to the above - mentioned parasitic diode. the structure of the ic inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. it is therefore requested to take care not to use the device in such manner that the voltage lower t han gnd (at p - substrate) may be applied to the input terminal, which may result in activation of parasitic elements. fig.3 4 simplified structure of monorisic ic 8. ground wiring pattern if small - signal gnd and large - current gnd are provided, it will be recommended to separate the large - current gnd pattern from the small - signal gnd pattern and establish a single ground at the reference point of the set pcb so that resistance to the wiring pattern and voltage fluctuations due to a large current wi ll cause no fluctuations in voltages of the small - signal gnd. pay attention not to cause fluctuations in the gnd wiring pattern of external parts as well. 9. selection of inductor it is recommended to use an inductor with a series resistance element (dcr) 0.1 or less. note that use of a high dcr inductor will cause an inductor loss, resulting in decreased output voltage. should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activ ated and output will be latched off. when using an inductor over 0.1, be careful to ensure adequate margins for variation between external devices and this ic, including transient as well as static characteristics. furthermore, in any case, it is recommen ded to start up the output with en after supply voltage is within operation range. status of this document the japanese version of this document is formal specification. a customer may use this translation version only for a referen ce to help reading the f ormal version. if there are any differences in translation version of this document formal version takes priority. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a parasitic element pin b other adjacent elements e b c gnd parasitic element
17 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 ordering information b d 8 9 6 7 f v m - t r package f vm : m sop8 packaging and forming specification tr: embossed tape and reel ( m sop8) physical dimension, tape and reel information marking diagram msop8(top view) d 8 9 part number marking lot numbe r 1pin mark 6 7
18 / 18 BD8967FVM data s heet 02.mar.2012 rev.001 www.rohm.com ? 2012 rohm co., ltd. all rights reserve d. tsz22111 ? 15 ? 001 tsz0220 1 - 0j3j0aj00070 - 1 - 2 revision history date revision changes 17.jan.2012 001 new release
datasheet d a t a s h e e t notice - rev.001 notice precaution for circuit design 1) the products are designed and produced for applicatio n in ordinary electronic equipment (av equipment, oa equipment, telecommunication equipment, home appliances, amusement equipment, etc.). if the products are to be used in devices requiring extremel y high reliability (medical equipment, transport equipment, aircraft/spacecraft, nuclear power controllers, fuel contro llers, car equipment including car accessories, safety devices, etc.) and whose malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the rohm sales staff in advance. if product malfunctions may re sult in serious damage, including that to human life, sufficient fail-safe measures must be taken, including the following: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits in the case of single-circuit failure 2) the products are designed for use in a standard environment and not in any spec ial environments. a pplication of the products in a special environment can deteriorate product per formance. accordingly, verification and confirmation of product performance, prior to use, is recomm ended if used under the following conditions: [a] use in various types of liquid, includin g water, oils, chemicals, and organic solvents [b] use outdoors where the products are exposed to direct sunlight, or in dusty places [c] use in places where the products are exposed to sea winds or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use in places where the products are exposed to static electricity or electromagnetic waves [e] use in proximity to heat-producing componen ts, plastic cords, or other flammable items [f] use involving sealing or coating the prod ucts with resin or other coating materials [g] use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering [h] use of the products in places subject to dew condensation 3) the products are not radiation resistant. 4) verification and confirmation of performance characte ristics of products, after on- board mounting, is advised. 5) in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse) is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 6) de-rate power dissipation (pd) depending on ambient temperature (ta). when used in sealed area, confirm the actual ambient temperature. 7) confirm that operation temper ature is within the specified range described in product specification. 8) failure induced under deviant condition from what def ined in the product specific ation cannot be guaranteed. precaution for mounting / circuit board design 1) when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the remainder of fl ux may negatively affect product performance and reliability. 2) in principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the company in advance. regarding precaution for mounting / circu it board design, please specially refe r to rohm mounting specification precautions regarding application examples and external circuits 1) if change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics of the products and external components, including transient characteristics, as well as static characteristics. 2) the application examples, their const ants, and other types of information cont ained herein are applicable only when the products are used in accordance with standard methods . therefore, if mass production is intended, sufficient consideration to external conditions must be made.
datasheet d a t a s h e e t notice - rev.001 precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution during manufacturing and st oring so that voltage exceeding product ma ximum rating won't be applied to products. please take special care under dry condition (e.g. grounding of human body / equipment / so lder iron, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1) product performance and soldered connections may deteriorate if the products are stored in the following places: [a] where the products are exposed to sea winds or corrosive gases, including cl2, h2s, nh3, so2, and no2 [b] where the temperature or humidity exceeds those recommended by the company [c] storage in direct sunshine or condensation [d] storage in high electrostatic 2) even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding recommended storage time period . 3) store / transport cartons in the correct direction, whic h is indicated on a carton as a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4) use products within the specified time after opening a dry bag. precaution for product label qr code printed on rohm product label is only for internal us e, and please do not use at cust omer site. it might contain a internal part number that is inconsistent with an product part number. precaution for disposition when disposing products please dispose them properly with a industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under controlled goods prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. prohibitions regarding industrial property 1) information and data on products, including application exam ples, contained in these specifications are simply for reference; the company does not guarantee any industrial pr operty rights, intellectual property rights, or any other rights of a third party regarding this information or data. ac cordingly, the company does not bear any responsibility for: [a] infringement of the intellectual property rights of a third party [b] any problems incurred by the us e of the products listed herein. 2) the company prohibits the purchaser of its products to exercise or use the in tellectual property rights, industrial property rights, or any other rights that either belong to or are controlled by the company, other than the right to use, sell, or dispose of the products.

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